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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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MC54/74HC4016A
Quad Analog Switch/ Multiplexer/Demultiplexer
J SUFFIX CERAMIC PACKAGE CASE 632-08
1
High-Performance Silicon-Gate CMOS
The MC54/74HC4016A utilizes silicon-gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF- channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full power-supply range (from VCC to GND). The HC4016A is identical in pinout to the metal-gate CMOS MC14016 and MC14066. Each device has four independent switches. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal-gate CMOS analog switches. This device is identical in both function and pinout to the HC4066A. The ON/OFF Control inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. For analog switches with voltage-level translators, see the HC4316A. For analog switches with lower RON characteristics, use the HC4066A. * * * * * * * Fast Switching and Propagation Speeds High ON/OFF Output Voltage Ratio Low Crosstalk Between Switches Diode Protection on All Inputs/Outputs Wide Power-Supply Voltage Range (VCC - GND) = 2.0 to 12.0 Volts Analog Input Voltage Range (VCC - GND) = 2.0 to 12.0 Volts Improved Linearity and Lower ON Resistance over Input Voltage than the MC14016 or MC14066 * Low Noise * Chip Complexity: 32 FETs or 8 Equivalent Gates LOGIC DIAGRAM
XA A ON/OFF CONTROL XB B ON/OFF CONTROL XC C ON/OFF CONTROL XD D ON/OFF CONTROL 1 13 4 5 8 6 11 12 10 9 3 2 YA
14
14 1
N SUFFIX PLASTIC PACKAGE CASE 646-06
14 1
D SUFFIX SOIC PACKAGE CASE 751A-03
14 1
DT SUFFIX TSSOP PACKAGE CASE 948G-01
ORDERING INFORMATION MC54HCXXXXAJ MC74HCXXXXAN MC74HCXXXXAD MC74HCXXXXADT Ceramic Plastic SOIC TSSOP
PIN ASSIGNMENT
XA YA YB XB B ON/OFF CONTROL C ON/OFF CONTROL GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC A ON/OFF CONTROL D ON/OFF CONTROL XD YD YC XC
YB ANALOG OUTPUTS/INPUTS YC
FUNCTION TABLE
On/Off Control Input YD L H State of Analog Switch Off On
ANALOG INPUTS/OUTPUTS = XA, XB, XC, XD PIN 14 = VCC PIN 7 = GND
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
10/95
(c) Motorola, Inc. 1995
3-1
REV 0
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MC54/74HC4016A
MAXIMUM RATINGS*
Symbol www..com VCC VIS Vin I Parameter Value Unit V V V Positive DC Supply Voltage (Referenced to GND) Analog Input Voltage (Referenced to GND) Digital Input Voltage (Referenced to GND) DC Current Into or Out of Any Pin - 0.5 to + 14.0 - 0.5 to VCC + 0.5 - 0.5 to VCC + 0.5 25 750 500 450 mA PD Power Dissipation in Still Air, Plastic or Ceramic DIP SOIC Package TSSOP Package Storage Temperature mW Tstg TL - 65 to + 150 260 300
_C _C
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP, SOIC or TSSOP Package) (Ceramic DIP)
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. I/O pins must be connected to a properly terminated line or bus.
v
v
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. Derating -- Plastic DIP: - 10 mW/_ C from 65_ to 125_ C Ceramic DIP: - 10 mW/_ C from 100_ to 125_ C SOIC Package: - 7 mW/_ C from 65_ to 125_ C TSSOP Package: - 6.1 mW/_ C from 65_ to 125_ C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIS Vin Parameter
Min 2.0
Max
Unit V V V V
Positive DC Supply Voltage (Referenced to GND) Analog Input Voltage (Referenced to GND) Digital Input Voltage (Referenced to GND) Static or Dynamic Voltage Across Switch
12.0
GND GND --
VCC VCC 1.2
VIO* TA
Operating Temperature, All Package Types Input Rise and Fall Time, ON/OFF Control Inputs (Figure 10)
- 55 0 0 0 0 0
+ 125 1000 600 500 400 250
_C
tr, tf
VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 9.0 V VCC = 12.0 V
ns
* For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
DC ELECTRICAL CHARACTERISTICS Digital Section (Voltages Referenced to GND)
Guaranteed Limit
Symbol VIH
Parameter
Test Conditions
VCC V 2.0 3.0 4.5 9.0 12.0 2.0 3.0 4.5 9.0 12.0
- 55 to 25_ C 1.5 2.1 3.15 6.3 8.4 0.5 0.9 1.35 2.70 3.6
v 85_ C v 125_ C
1.5 2.1 3.15 6.3 8.4 0.5 0.9 1.35 2.70 3.6 1.5 2.1 3.15 6.3 8.4 0.5 0.9 1.35 2.70 3.6
Unit V
Minimum High-Level Voltage ON/OFF Control Inputs
Ron = per spec
VIL
Maximum Low-Level Voltage ON/OFF Control Inputs
Ron = per spec
V
MOTOROLA
3-2
High-Speed CMOS Logic Data DL129 -- Rev 6
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At supply voltage (V CC - GND) approaching 3 V the analog switch-on resistance becomes extremely non-linear. Therefore, for low-voltage operation, it is recommended that these devices only be used to control digital signals. NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D). NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
High-Speed CMOS Logic Data DL129 -- Rev 6 www..com Symbol Symbol Symbol Ron tPLH, tPHL tPZL, tPZH tPLZ, tPHZ Ron ICC Ion Ioff Iin Maximum On-Channel Leakage Current, Any One Channel Maximum Off-Channel Leakage Current, Any One Channel Maximum Difference in "ON" Resistance Between Any Two Channels in the Same Package Maximum "ON" Resistance Maximum Quiescent Supply Current (per Package) Maximum Input Leakage Current, ON/OFF Control Inputs Parameter Parameter Parameter Vin = VCC or GND VIO = 0 V Vin = VCC or GND
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, ON/OFF Control Inputs: tr = tf = 6 ns)
DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to GND)
DC ELECTRICAL CHARACTERISTICS Digital Section (Voltages Referenced to GND)
Maximum Propagation Delay, ON/OFF Control to Analog Output (Figures 10 and 11)
Maximum Propagation Delay, ON/OFF Control to Analog Output (Figures 10 and 11)
Maximum Propagation Delay, Analog Input to Analog Output (Figures 8 and 9)
Vin VIH VIS = 1/2 (VCC - GND) IS 2.0 mA
Vin = VIH VIS = VCC or GND (Figure 4)
Vin = VIL VIO = VCC or GND Switch Off (Figure 3)
Vin = VIH VIS = VCC or GND (Endpoints) IS 2.0 mA (Figures 1, 2)
Vin = VIH VIS = VCC to GND IS 2.0 mA (Figures 1, 2)
v
v
v
Test Conditions
Test Conditions
3-3 VCC V VCC V VCC V 2.0 4.5 9.0 12.0 2.0 4.5 9.0 12.0 2.0 4.5 9.0 12.0 2.0 4.5 9.0 12.0 2.0 4.5 9.0 12.0 6.0 12.0 12.0 12.0 2.0 4.5 9.0 12.0 12.0 - 55 to 25_ C - 55 to 25_ C - 55 to 25_ C 0.1 -- 160 90 90 0.1 0.1 -- 20 15 15 -- 90 70 70 80 20 20 20 80 20 20 20 40 5 5 5 2 4 Guaranteed Limit Guaranteed Limit Guaranteed Limit 1.0 -- 200 110 110 -- 115 90 90 0.5 0.5 -- 25 20 20 90 25 25 25 90 25 25 25 50 7 7 7 20 40 1.0 -- 140 105 105 -- 240 130 130 40 160 100 30 30 30 110 35 35 35 1.0 1.0 -- 30 25 25 60 8 8 8
v 85_ C v 125_ C
v 85_ C v 125_ C
v 85_ C v 125_ C
MC54/74HC4016A
MOTOROLA Unit Unit Unit A A A A ns ns ns
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* Guaranteed limits not tested. Determined by design and verified by qualification. * Used to determine the no-load dynamic power consumption: PD = CPD VCC 2 f + ICC VCC . For load considerations, see Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D). NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
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AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, ON/OFF Control Inputs: tr = tf = 6 ns)
MOTOROLA
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND unless noted)
MC54/74HC4016A
www..com
Symbol
Symbol
THD
CPD
BW
--
--
--
C
Total Harmonic Distortion (Figure 14)
Crosstalk Between Any Two Switches (Figure 12)
Feedthrough Noise, Control to Switch (Figure 7)
Off-Channel Feedthrough Isolation (Figure 6)
Maximum On-Channel Bandwidth or Minimum Frequency Response (Figure 5)
Power Dissipation Capacitance (Per Switch)* (Figure 13)
Maximum Capacitance
Parameter
Parameter
fin = 1 MHz Sine Wave Adjust fin Voltage to Obtain 0 dBm at VOS Increase fin Frequency Until dB Meter Reads - 3 dB RL = 50 , CL = 10 pF
fin = 1 kHz, RL = 10 k, CL = 50 pF THD = THDMeasured - THDSource VIS = 4.0 VPP sine wave VIS = 8.0 VPP sine wave VIS = 11.0 VPP sine wave
fin Sine Wave Adjust fin Voltage to Obtain 0 dBm at VIS fin = 10 kHz, RL = 600 , CL = 50 pF
Vin 1 MHz Square Wave (tr = tf = 6 ns) Adjust RL at Setup so that IS = 0 A RL = 600 , CL = 50 pF
fin Sine Wave Adjust fin Voltage to Obtain 0 dBm at VIS fin = 10 kHz, RL = 600 , CL = 50 pF
v
ON/OFF Control Input
Control Input = GND Analog I/O Feedthrough
3-4 fin = 1.0 MHz, RL = 50 , CL = 10 pF fin = 1.0 MHz, RL = 50 , CL = 10 pF Test Conditions RL = 10 k, CL = 10 pF VCC V -- -- -- - 55 to 25_ C 35 1.0 10
Typical @ 25C, VCC = 5.0 V
Guaranteed Limit
v 85_ C v 125_ C
VCC V
High-Speed CMOS Logic Data DL129 -- Rev 6 4.5 9.0 12.0 4.5 9.0 12.0 4.5 9.0 12.0 4.5 9.0 12.0 4.5 9.0 12.0 4.5 9.0 12.0 4.5 9.0 12.0 4.5 9.0 12.0 35 1.0 10 15 Limit* 25_ C 54/74HC 0.10 0.06 0.04 - 80 - 80 - 80 - 70 - 70 - 70 - 40 - 40 - 40 - 50 - 50 - 50 30 65 100 60 130 200 150 160 160 10 35 1.0 mVPP MHz Unit Unit dB dB pF pF %
MC54/74HC4016A
3000 R on , ON RESISTANCE (OHMS) R on , ON RESISTANCE (OHMS) www..com 2500 2000 300 250 200
TBD
1500 1000 500 0
TBD
150 100 50 0
0
.25 .50 .75 1.00 1.25 1.5 1.75 2.00 Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
0
.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
4.5
Figure 1a. Typical On Resistance, VCC = 2.0 V
Figure 1b. Typical On Resistance, VCC = 4.5 V
160 140 R on , ON RESISTANCE (OHMS) 120 100 80 60 40 20 0 0 .5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND R on , ON RESISTANCE (OHMS)
120 100 80 60 40 20 0 0
TBD
TBD
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
Figure 1c. Typical On Resistance, VCC = 6.0 V
Figure 1d. Typical On Resistance, VCC = 9.0 V
80 70 R on , ON RESISTANCE (OHMS) 60 50 PROGRAMMABLE POWER SUPPLY - +
PLOTTER
MINI COMPUTER
DC ANALYZER
TBD
40 30 20 10 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0
VCC DEVICE UNDER TEST
ANALOG IN
COMMON OUT
Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
GND
Figure 1e. Typical On Resistance, VCC = 12.0 V
Figure 2. On Resistance Test Set-Up
High-Speed CMOS Logic Data DL129 -- Rev 6
3-5
MOTOROLA
MC54/74HC4016A
VCC www..com VCC GND VCC A OFF 14 VCC A GND ON 14 N/C VCC
7
SELECTED CONTROL INPUT
VIL 7
SELECTED CONTROL INPUT
VIH
Figure 3. Maximum Off Channel Leakage Current, Any One Channel, Test Set-Up
Figure 4. Maximum On Channel Leakage Current, Channel to Channel, Test Set-Up
VCC 14 fin 0.1F ON
VOS fin 0.1F
VIS OFF RL SELECTED CONTROL INPUT 7
VCC 14
VOS
CL*
dB METER
CL*
dB METER
7
SELECTED CONTROL INPUT
VCC
*Includes all probe and jig capacitance.
*Includes all probe and jig capacitance.
Figure 5. Maximum On-Channel Bandwidth Test Set-Up
Figure 6. Off-Channel Feedthrough Isolation, Test Set-Up
VCC/2 14 RL OFF/ON
VCC
VCC/2
RL IS
VOS CL* VCC ANALOG IN tPLH 50% ANALOG OUT 50% GND tPHL
VCC GND
Vin 1 MHz tr = tf = 6 ns CONTROL
7
SELECTED CONTROL INPUT
*Includes all probe and jig capacitance.
Figure 7. Feedthrough Noise, ON/OFF Control to Analog Out, Test Set-Up
Figure 8. Propagation Delays, Analog In to Analog Out
MOTOROLA
3-6
High-Speed CMOS Logic Data DL129 -- Rev 6
MC54/74HC4016A
VCC www..com ANALOG IN ON CL* 50% ANALOG OUT 50% *Includes all probe and jig capacitance. tPZH tPHZ 90% VOH HIGH IMPEDANCE 14 ANALOG OUT TEST POINT CONTROL 90% 50% 10% tPZL tPLZ tr tf VCC GND HIGH IMPEDANCE 10% VOL
7
SELECTED CONTROL INPUT
VCC
Figure 9. Propagation Delay Test Set-Up
Figure 10. Propagation Delay, ON/OFF Control to Analog Out
VIS VCC RL 14 ON 0.1 F TEST POINT OFF VCC OR GND RL SELECTED CONTROL INPUT 7 VCC/2 RL CL* RL CL* fin VOS
POSITION 1 WHEN TESTING tPHZ AND tPZH 1 2 VCC 1 2 ON/OFF CL* SELECTED CONTROL INPUT 7 POSITION 2 WHEN TESTING tPLZ AND tPZL VCC 14 1 k
VCC/2
VCC/2
*Includes all probe and jig capacitance.
*Includes all probe and jig capacitance
Figure 11. Propagation Delay Test Set-Up
Figure 12. Crosstalk Between Any Two Switches, Test Set-Up
VCC A 14 NC OFF/ON NC 0.1 F fin ON RL SELECTED CONTROL INPUT VCC/2 7 SELECTED CONTROL INPUT VCC CL* VIS
VCC
VOS TO DISTORTION METER
7
ON/OFF CONTROL *Includes all probe and jig capacitance.
Figure 13. Power Dissipation Capacitance Test Set-Up
Figure 14. Total Harmonic Distortion, Test Set-Up
High-Speed CMOS Logic Data DL129 -- Rev 6
3-7
MOTOROLA
MC54/74HC4016A
0 www..com - 10 - 20 - 30 dBm - 40 - 50 - 60 - 70 - 80 - 90 - 100 1.0 2.0 FREQUENCY (kHz) 3.0 DEVICE SOURCE FUNDAMENTAL FREQUENCY
Figure 15. Plot, Harmonic Distortion
APPLICATION INFORMATION
The ON/OFF Control pins should be at V CC or GND logic levels, VCC being recognized as logic high and GND being recognized as a logic low. Unused analog inputs/outputs may be left floating (not connected). However, it is advisable to tie unused analog inputs and outputs to VCC or GND through a low value resistor. This minimizes crosstalk and feedthrough noise that may be picked up by the unused I/O pins. The maximum analog voltage swings are determined by the supply voltages VCC and GND. The positive peak analog voltage should not exceed VCC. Similarly, the negative peak analog voltage should not go below GND. In the example
below, the difference between VCC and GND is twelve volts. Therefore, using the configuration in Figure 16, a maximum analog signal of twelve volts peak-to-peak can be controlled. When voltage transients above VCC and/or below GND are anticipated on the analog channels, external diodes (Dx) are recommended as shown in Figure 17. These diodes should be small signal, fast turn-on types able to absorb the maximum anticipated current surges during clipping. An alternate method would be to replace the Dx diodes with MO sorbs (Motorola high current surge protectors). MOsorbs are fast turn-on devices ideally suited for precise DC protection with no inherent wear-out mechanism.
VCC = 12 V
+ 12 V 0V
14 ANALOG I/O ON ANALOG O/I
+ 12 V 0V
+ 12 V
SELECTED CONTROL INPUT 7
OTHER CONTROL INPUTS (VCC OR GND)
Figure 16. 12 V Application
VCC Dx ON Dx VCC SELECTED CONTROL INPUT 7 Dx 14 VCC Dx
OTHER CONTROL INPUTS (VCC OR GND)
Figure 17. Transient Suppressor Application
MOTOROLA
3-8
High-Speed CMOS Logic Data DL129 -- Rev 6
MC54/74HC4016A
+5 V www..com ANALOG SIGNALS R* LSTTL/ NMOS R* R* R* 5 6 14 15 R* = 2 TO 10 k CONTROL INPUTS 7 14 ANALOG SIGNALS ANALOG SIGNALS HCT BUFFER 5 6 14 15 CONTROL INPUTS 7 14 ANALOG SIGNALS +5 V
HC4016
LSTTL/ NMOS
HC4016
a. Using Pull-Up Resistors
b. Using HCT Buffer Figure 18. LSTTL/NMOS to HCMOS Interface
VDD = 5 V
VCC = 5 TO 12 V
13 3 5 7 9 11 14
1
16
ANALOG SIGNALS
14
ANALOG SIGNALS
HC4016 MC14504 2 4 6 8 10 5 6 14 15 CONTROL INPUTS 7
Figure 19. TTL/NMOS-to-CMOS Level Converter Analog Signal Peak-to-Peak Greater than 5 V (Also see HC4316A)
CHANNEL 4
1 OF 4 SWITCHES 1 OF 4 SWITCHES COMMON I/O 1 OF 4 SWITCHES 1 OF 4 SWITCHES - INPUT 1 OF 4 SWITCHES + 0.01 F 1 2 34 CONTROL INPUTS LF356 OR EQUIVALENT OUTPUT
CHANNEL 3
CHANNEL 2
CHANNEL 1
Figure 20. 4-Input Multiplexer
High-Speed CMOS Logic Data DL129 -- Rev 6 3-9
Figure 21. Sample/Hold Amplifier
MOTOROLA
MC54/74HC4016A
OUTLINE DIMENSIONS
www..com
J SUFFIX CERAMIC DIP PACKAGE CASE 632-08 ISSUE Y
-A-
14
8
-B1 7
C
L
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMESNION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. INCHES MIN MAX 0.750 0.785 0.245 0.280 0.155 0.200 0.015 0.020 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0 15 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.94 7.11 6.23 5.08 3.94 0.50 0.39 1.65 1.40 2.54 BSC 0.38 0.21 4.31 3.18 7.62 BSC 15 0 0.51 1.01
-TSEATING PLANE
K F G D 14 PL 0.25 (0.010) N
M
M
S
TA
J 14 PL 0.25 (0.010)
M
T
B
S
DIM A B C D F G J K L M N
N SUFFIX PLASTIC DIP PACKAGE CASE 646-06 ISSUE L
14 8 NOTES: 1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.62 BSC 0 10 _ _ 0.39 1.01
B
1 7
A F C N H G D
SEATING PLANE
L
J K M
MOTOROLA
3-10
High-Speed CMOS Logic Data DL129 -- Rev 6
MC54/74HC4016A
OUTLINE DIMENSIONS
www..com
D SUFFIX PLASTIC SOIC PACKAGE CASE 751A-03 ISSUE F
-A-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
14
8
-B-
1 7
P 7 PL
0.25 (0.010)
M
B
M
G C
R X 45
F
SEATING PLANE
D
14 PL
K
M
M B
S
J
0.25 (0.010)
T
A
S
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.75 8.55 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 BSC 0.25 0.19 0.25 0.10 7 0 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 7 0 0.228 0.244 0.010 0.019
DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G-01 ISSUE O
14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0 8 _ _
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
N
2X
L/2
14
8
0.25 (0.010) M
L
PIN 1 IDENT. 1 7
B -U-
N F DETAIL E
0.15 (0.006) T U
S
A -V- J J1
SECTION N-N -W-
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
High-Speed CMOS Logic Data DL129 -- Rev 6
3-11
EEE CCC EEE CCC EEE CCC EEE CCC
K K1
MOTOROLA
MC54/74HC4016A
www..com
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us: USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com -TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
MOTOROLA
CODELINE
*MC54/74HC4016A/D*
3-12
MC54/74HC4016A/D High-Speed CMOS Logic Data DL129 -- Rev 6

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